[Macchiato] DRAM/PCIe remapping

[Matt Sealey]

Hi Ard,

On 9 August 2017 at 10:54, Ard Biesheuvel <ard.biesheuvel at linaro.org> wrote:
> On 9 August 2017 at 16:00, Matt Sealey <neko at bakuhatsu.net> wrote:
>
>> The other question is, is the limit of 4GB DRAM solely a device tree issue combined
>> with this?
>>
>> # ARM Pcds
>> gArmTokenSpaceGuid.PcdSystemMemoryBase|0
>> gArmTokenSpaceGuid.PcdSystemMemorySize|0x100000000
>> gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|36
>>
>>
>> Or am I missing something? Is that '36' evidence of an upper limit for windowing
>> the DRAM up high? How does UEFI handle a sparse memory map if the 'base' is 0 and
>> it has a size, but not a way of breaking this out?
>>
>
> Hi Matt,
>
> First of all, using your 16 GB of DRAM is simply a matter of
> redefining PcdSystemMemorySize to 0x4_0000_0000. The reason I did not
> put that in is because mine was shipped with 4 GB, and we currently
> have no means to detect it automatically.

So the base value has really no meaning? I mean it'll always start at
0 but the memory map in
the ATF source (and the DT..) implies there are peripherals in there.

> For PCIe, it should be possible to change the remapping windows to
> only map the first 1 GB of DRAM at 0x0, and put everything else at
> 0x1_0000_0000 and beyond. This should leave ample space for PCIe
> MMIO32, although I wonder why you need all that space below 4 GB. Is
> that a performance concern?

Absolutely not a 'performance' concern, I just want to see if it can
be done - pure curiosity.

Thanks,
Matt